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  #31  
Old 10-21-2007, 06:06 PM
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You've very likely played with the voltages too much and have some distributed resonance on the components. Set all to default. Shut the system down for at least 3 or more hours. A day or two might be necessary.
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  #32  
Old 10-21-2007, 06:12 PM
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Should I plug off the PSU or keep the PSU connected and just use its switch to turn it off? (So everything is still grounded)
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  #33  
Old 10-21-2007, 06:17 PM
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I would turn the system off. Remove the power plug. Remove the CMOS battery. Remove the DRAM. Remove the Video Card. Let stand for a few days if you can. I doubt if you have damaged the components yet and this should allow the DRAM and all other CMOS substrates to fully release the discharged electronic resonance.
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  #34  
Old 10-21-2007, 06:28 PM
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I'll try that.. thanks.
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  #35  
Old 10-22-2007, 08:25 AM
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I've pulled everything out yesterday, I'll let it sit 3 days completely unplugged

In the meantime.. I'm doing some more reading.


Ramguy? I've just found one of the first quotes by you with a tested 4 dimm setup on 680i. (Striker Extreme)

Quote:
But we have tested this MB with 4 6400 Modules
at 800 MHz with an 1066 FSB CPU, with these settings:
SLi ready: Disabled
Memory Voltage: 2.0v
NB Core Voltage: 1.4v
TCL: 5
TRCD: 5
TRP: 5
TRAS: 15
Command Per Clock: 2
TRC: 28

http://www.asktheramguy.com/v3/showt...256#post311256
So, seems like now there is some lab experience with 4 banks populated and 680i!

I do have a similar setup, however to make it short I have a native 1333 Mhz CPU fsb (4*333) and the 2GB sticks. (PC6400C5)

I don't know how you came to tRC: 28 but I think the baseline for this is tRAS+tRP and you've loosened it a bit?

I'll try these next, any suggestions now with your lab experience?

Quote:
SLi ready: Disabled
Memory Voltage: Auto (with new 1305 bios sets to 2,1V if 4 banks populated!)
NB Core Voltage: 1.4v
TCL: 5
TRCD: 5
TRP: 5
TRAS: 18
Command Per Clock: 2
TRC: 28
Just loosened the tRAS a bit, but whatever. Perhaps you have another idea.

Last edited by b1z; 10-22-2007 at 08:32 AM.
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  #36  
Old 10-22-2007, 05:29 PM
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What BIOS version are you using and what is the O.S. you are using and what are the exact settings you have set for Both memory and CPU?
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  #37  
Old 10-23-2007, 04:05 AM
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Quote:
Originally Posted by RAM GUY View Post
What BIOS version are you using and what is the O.S. you are using and what are the exact settings you have set for Both memory and CPU?
BIOS is 1305 (2007/08/27)
OS is GNU/Linux 2.6.23.1 x86_64 (64bit)


The exact BIOS Settings are.. well, since it got unstable I was yet unable to find alternative ones which would have worked. You can read in post 21 about what I've tried so far, including setting the RAM to 667mhz.
Perhaps I've just missed the right combination.

However, as requested here are the settings I've got memtest86+ v1.70 run through for totaling around 45 hours without errors.
Note that the Striker Extreme overvolts a bit so the 1.85V can be seen as 1,9V on others..

Quote:
Asus Striker Extreme + TWIN2X4096-6400C5DHX + Intel QX6850
Loaded Setup defaults, set only these manually.
The remaining Auto Settings could be of interest...

====================================================
Timing:

tCL: 5T
tRCD: 5T
tRP: 5T
tRAS: 18T
Command Per Clock (CMD): 2 clock
tRRD: Auto
tRC: Auto
tWR: Auto
tWTR: Auto
tREF: Auto
Async Latency: Auto

SLI Ready Memory: Disabled

Voltage:

VCore Voltage: Auto
Memory Voltage: 1.85 V
1.2V HT Voltage: Auto
NB Core Voltage: Auto
SB Core Voltage: Auto
CPU VTT Voltage: Auto
DDR2 Controller Ref Voltage: Auto
DDR2 Channel A Ref Voltage: Auto
DDR2 Channel B Ref Voltage: Auto


Other (perhaps you want to know?):

ECC stuff: Disabled (since no ECC memory is detected)

CPU Spread Spectrum: Disabled
PCIE Spread Spectrum: Disabled
MCP PCIE Spread Spectrum: Disabled
SATA Spread Spectrum: Disabled
LDT Spread Spectrum: Disabled

CPU Internal Thermal Control: Disabled
Limit CPUID MaxVal: Disabled
Enhanced C1 (C1E): Disabled
Execute Disable Bit: Enabled
Virtualization Technology: Enabled
Enhanced Intel Speedstep Tech: Disabled
LDT Frequency: 5x

PCIEX16_1 Frequency (Mhz): Auto
PCIEX16_2 Frequency (Mhz): Auto
PCIEX16_3 Frequency (Mhz): Auto
SPP<->MCP Ref Clock, Mhz: Auto

FSB - Memory Clock Mode: Auto
FSB - Memory Ratio: Auto
FSB (QDR), Mhz: 1333
MEM (DDR), Mhz: 800

USB Legacy Support: Disabled

AI Tuning: Auto
====================================================
My CPU is a QX6850 so I was using the native 1333Mhz (4*333) CPU FSB.

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  #38  
Old 10-24-2007, 04:06 PM
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Quote:
Originally Posted by DerekT View Post
I would turn the system off. Remove the power plug. Remove the CMOS battery. Remove the DRAM. Remove the Video Card. Let stand for a few days if you can. I doubt if you have damaged the components yet and this should allow the DRAM and all other CMOS substrates to fully release the discharged electronic resonance.
DerekT? Any new ideas yet?
I'm going to try it again tomorrow with the mentioned settings..
The whole time unplugged is 84 hours - should be enough?!

I'm going to use these as the new starting point:
Quote:
SLi ready: Disabled
Memory Voltage: 2.0v
NB Core Voltage: 1.4v
TCL: 5
TRCD: 5
TRP: 5
TRAS: 18
Command Per Clock: 2
DRAM FSB: 667Mhz
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  #39  
Old 10-24-2007, 04:21 PM
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Find your stability first. Use memtest and be certain that your system, (with the above settings) is stable.

I can NOT emphasize this enough. Find your stability first. Be certain... Take the time. Run both Memtest for 3 -4 passes. Run Prime95 v2.55 for at least 8 hours.

Is your system fully stable?

Here's a screenshot of 3.8GHz with a P5B (Commando) with 2GB of DRAM. It will NOT make 3.6GHz with 8GB of DRAM.


Last edited by DerekT; 10-24-2007 at 04:27 PM.
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  #40  
Old 10-24-2007, 04:28 PM
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Thats what I want to do, if the settings are unstable,
could it help to even set all sub timings to the slowest settings possible and work up from there?
If not, what about inrceasing the "big four"? Eg. using 6-6-6-20 at 2T?

Just to have some ideas in which direction to go if the above are still unstable
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  #41  
Old 10-24-2007, 04:35 PM
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Quote:
Originally Posted by b1z View Post
Thats what I want to do, if the settings are unstable,
could it help to even set all sub timings to the slowest settings possible and work up from there?
If not, what about inrceasing the "big four"? Eg. using 6-6-6-20 at 2T?
You can try it but keep in mind that having the strobes closed for too long a period is as useless as having them open for too short a period. You must keep in mind that there is a definite possibility that you will NOT achieve stability with that DRAM setup. But we are both ahead of ourselves now. Just do the testing.

Edit: Rethinking your latest question. You just might get by with 5-6-6-20. I do doubt that you can allow the main strobe to stay open at a Column Access Strobe Latency (CL) of 6. You might with a CL of 5 though. Always run your system at a 2T Command Rate. If you have been testing with a Command Rate of 1, retest with a Command Rate of 2T.

Last edited by DerekT; 10-25-2007 at 04:20 AM.
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  #42  
Old 10-25-2007, 03:02 PM
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Damn I don't get it pass memtest anymore.

Tried everything metioned above at 800 Mhz and 667 Mhz.

The common error I have seen along all errors regardless the settings I've tried is this:

For Example the "random pattern inversion" test:

efefefef is written into the memory.

Then the inverse pattern is written over and
memtest reads and checks if the first pattern was succesfully overwritten by the inversed one.

This is where the error appears:

afefefef is read out.

This does not match the inverse pattern (afafafaf ?) so there is only the first bit / first two? written.

Seems like the auto subtimings are too tight anywhere because the write operation is corrupted / choked?
Something is closing too fast for the memory controller to address and write the data?

Any ideas? tWR?

Last edited by b1z; 10-25-2007 at 03:09 PM.
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  #43  
Old 10-25-2007, 03:16 PM
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What test # are you getting errors on and have you tested the modules one set at a time?
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  #44  
Old 10-25-2007, 03:24 PM
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Yes tested them each one on their own and get no errors after 3 passes for each stick and each pair.

This was on everything set to auto, spd timings 5-5-5-18-2T and 1,85V.


The test # varies extremely depending the voltage and timing settings.

Using the suggested settings of 5-5-5-18-2T at 2.0V and everything else on auto gives the errors in test #7. (the best result this far since no errors before this)

Going to 5-6-6-20-2T at 2.0V gives errors as soon as test #2.

Using 5-5-5-18-2T at 2.0V plus setting the slowest settings for all other subtimings gives errors always in test #3.
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  #45  
Old 10-25-2007, 03:30 PM
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You did disable legacy USB correct? If so then let's try replacing your modules, please use the On Line RMA Request Form and we will be happy to replace it.
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