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Does matched pair matter for single channel?


kevinc

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I purchased a twin kit of 2x2GB 6400C5 modules. Either module tested by itself will pass Memtest. When run together, however, even in single channel, a bit failure always occurs at 0x00004000. I thought that small differences in timing would only affect dual channel operation. But in either case this matched pair obviously isn't. I have a couple of questions on how to read the other Memtest results.

 

If I place the modules in a single channel, and the errors occur above the 2GB boundary, does that mean the defect must be in the second module? I would assume yes, from an assumption that memory addresses are allocated in linear sequence.

 

If I am using dual channel, and the errors occur above the 2GB boundary, does that mean the defect must be in the second module? I really have no idea how dual channel improves bandwidth... is it more comparable to multithreading or to striping?

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If I place the modules in a single channel, and the errors occur above the 2GB boundary, does that mean the defect must be in the second module?
If I am using dual channel, and the errors occur above the 2GB boundary, does that mean the defect must be in the second module?
No and no.

 

Dual channel's like going from a 1 lane to a 2 lane highway. Cars are going the same speed, but more can use the road at the same time.

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I tried a different test, this time by setting the memory to Ganged mode. With this, the memory passed a 10-hr test in full 2x2GB dual channel. Does this help identify the source of the problem? Maybe the memory controller?
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