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Problem with Asus P5K and TWIN2X2048-6400


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Hello everybody,


I bought recently a new motherboard (Asus P5K) and 2 TWIN2X2048-6400 (so 4x1024MB of ram).


I run a memtest86+ test with the default speficied timings (auto detected in the bios) and I receive plenty of errors.


I tried to manually enter the timings (5-5-5-18-2T ; 1,9V and 800 mhz) without any results.


So I began to test one by one the four memory modules and it appears that 3 of them don't work at the specified timings. Only one memory module run memtest86+ without any errors.


When I change the frequency in the bios (from 800 mhz to 667) the four memory modules execute the memtest86+ without errors.


But I'm a bit sad that 3 of 4 new memory modules fail to execute memtest at the specified timings. I want also add that the memory modules are officially supported in the motherboard manual and in the memory configurator on the corsair website.


Will somebody have any ideas how to resolve the problem ?

It seems strange that 3 of 4 new ram modules will be bad ?


ps : I tried other memory voltage (1,9v to 2,1v) without any positive results.

ps2: I upgrade my motherboard bios with the latest but it doesn't change anything.

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Do you get similar errors if you test the modules individually in a different memory slot?

Yes :(


I also tried to only connect my power supply to my motherboard to see if it can be a power supply problem, but it wasn't.


I'm still searching ...

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When you populate all four dram slots you usually need to drop the bandwidth as the on motherboard memory controller (Northbridge/MCH) can not keep up with the extra DRAM at the rated 6400 speed. You will need to drop the speed of the DRAM from 800Mhz to 667Mhz. If you had purchased 4 X 1024MB of PC8500 (1066Mhz) DRAM, then you would have had to drop to PC6400 (800MHz) DRAM, etc. 2 X 2048 will not issue this problem. This is a problem of all 4 banks being populated and the on motherboard memory controller's inability to access and load four banks as fast as it can with two banks.


Think of it this way. If you have a small phone book, then when you go into the index to find the page where you will find the phone number you are doing so at a certain speed due to the pages of the Index. Then you have to drive through the pages to get to the number. Now if your index is twice as large and the pages twice as many, then it takes longer to access the data. Now DRAM has a Strobe and the length of the strobe is how long the rows and columns can be left open before they must be refreshed. There is not enough time for the dram to be refreshed and then accessed with 4GB at the full access speed of the DRAM. The chipsets are optimized for 2GB, not 4GB and for 2 DRAM slots, not 4 DRAM slots populated. You can overclock the FSB (and hence the Memory Controller Hub = MCH) to gain some extra bandwidth and thus access the capabilities of the DRAM since the chipset is now clocked up. Usually when you clock up the FSB and concurrently the Memory Controller Hub (MCH) you need to raise the voltages of the CPU/MCH a bit as well.


That being said, if you memtest each stick singly at the rated speed and timings, and some sticks do not test free of errors and some do, then you have some DRAM with errors that need RMA.

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