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TWINX3200-LLPT Failing-Bad Sticks


enolam

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Have a matched pair of Twinx1024-3200LLPT's @ 200mhz on a Asus a7n8x Deluxe mobo.

 

Revision on the sticks is v1.2, about 1 year or so old.. just upgraded from a xp2200 + to a xp 3200+ running the newest bios rev1008. PCB rev 2.0

 

MemTest v 3.2 is throwing errors in both sticks even when tested individually.

 

Without changing anything in the bios the timing swere 2-2-2-6, even with the spd setting enabled.. changed settings to the speced 2-2-3-6 and still getting errors. As well as 2-3-3-6 System is not overclocked at all.

 

Tested the ram in a newer Via Athlon 64 chipset as well as an older Via single channel board running a 2200+.

 

Big question is if i'm reading the timings right.. could someone explain to me exactly what order in my bios 2-2-3-6 to me in my bios is bottom to top on the 4 settings and not top to bottom. The middle two are the only ones i'm unsure of as the bottom one has 1 1.5 2 and 2.5 settings. and the other was already at 6.

 

I've had other memory in this board and it didn't give me any errors, the problem i'm getting most of the times are in games such as HL2, WOW Planetside, SWG and a few others all memory erros failing to read at the Same addresse.

 

Can't think of anything else to test before rma time comes.. tested ram in 2 boards both failing memt3.2 at the same addresses.. 2 on athlon xp platforms and 1 in a athlon 64 platorm..

 

Thank you for your time!!

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  • Corsair Employees

Please check the FSB jumper is set to pins 2-3 and I would load setup defaults and then set the following timings with the modules in slots 1-3 or 2-3 but please test them one at a time with http://www.memtest.org to be sure.

CPU Freq: 200 MHz (3200+) (133MHz for 2200+)

Memory Frequency: 100%

Dim Voltage to 2.7 Volts

Resulting Frequency: 200MHz ( 133 MHz for 2200+)

SDRAM CAS Latency: 2T

SDRAM RAS to CAS Delay (tRCD): 3T

SDRAM Row Precharge (tRP): 2T

SDRAM Active to Precharge Delay (tRAS): 6T

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Using the instructions outlined before, I was able to run 4 passes without errors.

 

Few questions though:

Latency Values 2-3-2-6 were displayed in Memtest, which is what the specs on the memory are.

 

Now the values in order from bottom to top in my bios are as follows 2-2-3-6.

 

Jumper CHANGED to pins 2-3 from 1-2. (100mhz setting on mb diagram)

My bios reads now:

Ext Clock Speed 200mhz

Mem Clock speed @ 100% 200mhz

DDR Voltage 1.7 up from 1.6

Active Precharge Delay-6

RAS to CAS Delay-3

RAS Precharge-2

Latency-2T

 

Now where is MemTest Getting the values 2-3-2-6, and the order in my bios are 2-2-3-6?

 

Can you tell me which one of those numbers on the spec sheet for that ram(2-3-2-6) correspond with the values you gave me? I will save it for future reference. Even tho slots 2-3 are blue indicating dual channel mode slots, can slot 1 be substituded for slot 2? Also, going to let it run again tonight just to make sure.

 

And, why would these correct values not be auto detected. Would it be even tho this is pcb rev 2.0 of this board, it didn't 'officially' support it at release? Even with the 1008 bios rev, you would think it would be ready to use these modules since these are the ones they test on the board, as well as the board you used to configure this matched pair.

 

But, all in all. I thank you mr RAM GUY!!! Saved me a week or so without my machine!!

 

Just wish the 0-0-0-0 latency values were standardized order in every bios :)

 

P.S. Which one of those changed is more than likely the cause of the problem? And what did me moving that jumper do, as the manual says only to set it there if running a 100mhz ext freq cpu. And did this stay stable in this configuration early on for over a year due to being ran a a lower speed(ddr266)?

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  • Corsair Employees
Well the order is not important with the timings as listed, and if every one was the same why would you use one over another? At any rate that is why I always specify the settings or list the one that is obvious. And it's not uncommon for some MB's to need to have the memory timings tweaked when using aggressive memory modules. It would be speculation, but in most cases the MB makers have implemented performance options that will interfere with modules that are not set to JEDEC defined values. Setting the timings manually has always been suggested by us and why we post them on XMS Qualification and Testing!
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