Asus Striker Extreme & TWIN2X2048-6400C4DHX G

I am experiencing problems with my new rig.

I assembled it over two weeks ago. The system run perfectly for a week as I installed more and more applications and other stuff that I needed.

First time I noted problems was when the the self test of my APC Ups would fail. I don't know or suspect this is related to RAM issues. But it was the first time that everything not worked smoothly.

The same day I started to experience that the computer froze completely, no BSOD, just instantly freezing, capslock and numlock won't blink. The first freezes happened one week after assembly. Then it worked fine for several days until wednesday the 7th november. When it froze in the morning. After that It have run to this day, when I experienced a new freeze this morning.

I updated to the the latest BIOS version 1305 a week ago, I haven't reset BIOS to default after that, maybe I should do that or load optimized defaults?

Current settings for the RAM according to the BIOS are: 800Mhz

Tcl:5 Trcd:5 Trp:5 Tras:18 2T Timing.

I installed the memory in slot A1 & B1, (the first and third slot)

According to Asusprobe some voltage setting are:

DDR2 Term: 0,93V

MEMORY: 1,89V

What settings should I use in BIOS to get the most stability out of my system?

Asus PC Probe any good? Any other application when it comes to monitor the system that you recommend here on the forum that is better or that we know how good it works?

About Overclocking:

I do not plan to do any overclocking at this time or for the nearest six months, first and foremost I want a stable system.

Thank you for your time.

I use Everest Ultimate Engineer Edition from Lavalys (http://www.lavalys.com) for all my system diagnostics.

Download memtest from http://www.memtest.org and extract the ISO image. Burn the ISO image to an CD-ROM disk.

Then restart your system, enter your BIOS setup utility, and try these settings:

Multiplier = 9

FSB = 333

DRAM = Unlinked and set to 800Mhz

Memory Timing

 

FSB - Memory Clock Mode: Unlinked

CPU FSB: 333

CPU Multi: 9

DDR FSB: 800

tCL: 4

tRCD: 4

tRP: 4

tRAS: 12

 

Advanced Memory Settings

tRRD: 5

tRC: 24

tWR: 6

tWTR: 8

tREF: Auto

tRD: 7

tRFC: 42

Async Latency: Auto

CMD: 2T

 

Voltages

Vcore = Auto

Vdimm (DRAM Voltage) = 2.1v

Termination Voltage = Auto

1.2v HT: Auto

NB Vcore: 1.45v

SB Vcore: Auto

CPU VTT: Auto

Boot to the optical drive with the memtest disk and allow for two full passes.

Results?

I use Everest Ultimate Engineer Edition from Lavalys (http://www.lavalys.com) for all my system diagnostics.

I will look into that program.

Download memtest from http://www.memtest.org and extract the ISO image. Burn the ISO image to an CD-ROM disk.

Ahh yes, good old memtest, I already have that burned and ready to go.:sunglasse

Then restart your system, enter your BIOS setup utility, and try these settings:

I have some questions regarding the settings.

Multiplier = 9

I Found and set this one, it was already at 9.

FSB = 333

Uncertain where this setting is. I did not find it.

DRAM = Unlinked and set to 800Mhz

I found this one.

Memory Timing

FSB - Memory Clock Mode: Unlinked

tCL: 4

tRCD: 4

tRP: 4

tRAS: 12

All the above settings I found and was able to set.

CPU FSB: 333

I did not find where to set this, is it the:

FSB (QDR), Mhz setting? It was only possible to set this to a value between 500-1333. not 333.

Someone have taken photos at the bios settings for the Asus striker extreme.

http://i4memory.com/reviewimages/motherboards/asus/680i_strikerextreme/bios_html/photos/680i_striker_010.jpg

One can change the last number in the filename ang get different biosscreens. 680i_striker_001.jpg and upwards.

CPU Multi: 9

Is this meaning the same as above? Then no probs here.

DDR FSB: 800

Is it the setting here under Mem (DDR), Mhz?

http://i4memory.com/reviewimages/motherboards/asus/680i_strikerextreme/bios_html/photos/680i_striker_008.jpg

Mine was already at 800 and the FSB (QDR) was at 1333.

Advanced Memory Settings

tRRD: 5

tRC: 24

tWR: 6

tWTR: 8

tREF: Auto

tRD: 7

tRFC: 42

Async Latency: Auto

CMD: 2T

I did not find this one, is it the command per clock that could be set to

either Auto, 1clock or 2clock. Mine was AUTO.

Picture:

http://i4memory.com/reviewimages/motherboards/asus/680i_strikerextreme/bios_html/photos/680i_striker_013.jpg

Voltages

Vcore = Auto

NB Vcore: 1.45v

SB Vcore: Auto

CPU VTT: Auto

I was able to find and set these. The NB voltage is before I've changed at this time at 1,23.

Vdimm (DRAM Voltage) = 2.1v

Termination Voltage = Auto

1.2v HT: Auto

I did not find these settings. I would be grateful for any help in setting the settings I have questions about.

FSB = 333

Uncertain where this setting is. I did not find it.

 

CPU FSB: 333

I did not find where to set this, is it the:

FSB (QDR), Mhz setting? It was only possible to set this to a value between 500-1333. not 333.

Set QDR (Quad Data Rate) of 333 x 4 = 1333

CPU Multi: 9

Is this meaning the same as above? Then no probs here.

Yes

Is it the command per clock that could be set to either Auto, 1clock or 2clock. Mine was AUTO.

Yes, set to 1 Clock.

Vdimm (DRAM Voltage) = 2.1v

 

I did not find these settings.

You can't find the DRAM voltage setting? Set MEMORY: 1,89V to 2.1v

Did you update your BIOS to the newest version? This is important!

Thanks for taking the time and helping me out!:cool:

Set QDR (Quad Data Rate) of 333 x 4 = 1333

 

Yes

 

Yes, set to 1 Clock.

 

You can't find the DRAM voltage setting? Set MEMORY: 1,89V to 2.1v

 

Did you update your BIOS to the newest version? This is important!

Yes I have upgraded to the latest Bios which is version 1305.

You mean the second setting from above in this picture?

http://i4memory.com/reviewimages/motherboards/asus/680i_strikerextreme/bios_html/photos/680i_striker_030.jpg

Every other voltagesetting I could think of was on AUTO.

You mean the second setting from above in this picture?

Yes, that's the one. :) Memtest away and then use the newest Prime95 Download Here and let it run for ~8 hours to test system stability.

Hi, I'm back from work and gonna get started with the settings now, hang on.

Ok, the settings are set, I loaded optimal defaults and set the settings. I disabled LEGACY USB in BIOS.

Question:

I assume that I run memtest without modifying any settings. I Just let it go with memtests default settings?

I assume that I run memtest without modifying any settings. I Just let it go with memtests default settings?

Yes. Let it run at least 2 full passes. Then press "Esc" as it will continuously loop.

Okay, Directly after I made the above post I closed Firefox and started Miranda to send my friend som well deserved chatt messages. The computer frose while Miranda was starting.

The system was completely dead again. Nothing happened when pressing NUMLOCK.

I Rebooted the computer and booted the memtest CD. Now I did get errors. I think I was upp in 6 errors before the first pass was completed.

I turned the computer off for a while and then restarted it. When I went into windows it had failed to load the graphic driver and there was an error message about the sounddrivers. The Firewall-program did not start either. Before I could do anything or check the system logs the computer froze completely.

I have now restarted the computer via Reset, and now everything looks normal. There was an error message about the regisrty being restored. I have created a system restore point now.

Time to set to Auto and test.

FSB and Memory Config

 

SLI-Ready Memory = CPUOC 0%

SLi-Ready Memory = Enable

FSB - Memory Clock Mode = Linked

 

Memory Timing Section

 

Memory Timing Setting = Expert

tCL (CAS Latency) = Auto

tRCD = Auto

tRP = Auto

tRAS = Auto

Command Per Clock = = Auto

tRRD = Auto

tRC = Auto

tWR = Auto

tWTR = Auto

tREF = Auto

Please memtest. You NEED to memtest after ANY change to your system. Changing BIOS settings and entering Windows is a recipe for disaster. If the DRAM is producing errors you will, sooner or later, corrupt your OS, and then you will have both BIOS settings and OS software as variables to instability. Thus isolating the issue will become quite problematic.

You need to Memtest to stability. Then install a fresh OS. Then we can continue.

Download memtest from http://www.memtest.org and extract the ISO image. Burn the ISO image to an CD-ROM disk. Boot to the optical drive with the memtest disk and allow for two full passes.

Time to set to Auto and test.

 

 

Please memtest. You NEED to memtest after ANY change to your system. Changing BIOS settings and entering Windows is a recipe for disaster. If the DRAM is producing errors you will, sooner or later, corrupt your OS, and then you will have both BIOS settings and OS software as variables to instability. Thus isolating the issue will become quite problematic.

You need to Memtest to stability. Then install a fresh OS. Then we can continue.

 

Download memtest from http://www.memtest.org and extract the ISO image. Burn the ISO image to an CD-ROM disk. Boot to the optical drive with the memtest disk and allow for two full passes.

I have run memtest. Before the first pass was finished it produced errors, I can run it again and write down exactly which errors it produced.

I will now enter the setting you given me in this post and then run memtest immediately.

Yes, but you need to Memtest before entering Windows.

If you get errors. Can you then test for one stick at a time?

Results?

Yes, but you need to Memtest before entering Windows.

 

If you get errors. Can you then test for one stick at a time?

 

Results?

I set the settings as per your second set of instructions.

SLI-Ready Memory = CPUOC 0%

SLi-Ready Memory = Enable

I did not find the above settings.

You didn't specify tRD & tRFC settings. I left them at their previous value. This time Memtest gave of a GOOD bunch of errors, 2048 of em. Then I restarted. I have now set all the setting to auto and default.

I can test them one at a time, but would it matter if only one is faulty? Since they are paired.

These modules would not have the EPP profiles so the tested settings would need to be manually set as well as the Voltage and set the Command Rate to 2t as well. And yes testing the modules will help to know it is some other problem, IE one works and one does not get the modules replaced, or they both work or do not work them look for some other cause.

Excuse my error FromSweden. You will have to manually set.

Install one stick and test it. Then remove that stick and install the second stick and test.

Results?

Hello again my friends,

I entered the settings in the post above, started memtest, I made no modifications, just let the default test run and here are my results:

Test 1

module1 in A1 &

module2 in B1

Result: There was lot of errors before the first pass was completed.

Test 2

module2 in B1

Result: There was no errors, it ran for over 7 passes.

Test 3

module1 in A1

Result: There was a lot of errors.

Test 4

module1 in A2

Result: There was a lot of errors.

Test 5

module2 in B1

Result: There was no errors, it ran for over 1 passes.

Currently I am now running with only module2 in B1. The computer was not able to load windows when only module1 was in A1.

Question:

I read somewhere on Asus forum that depending on if the rammodules was T1 or T2 you should either use it in slots A1&B1 or A2&B2. I tried to find that post last evening but I was not able to find it. Is this true? If it is the it may be problematic for users who want o use all four slots.

So anyway, what do we do now?

I read somewhere on Asus forum that depending on if the rammodules was T1 or T2 you should either use it in slots A1&B1 or A2&B2.

You MUST set to 2T. Contrary to popular belief, the Command rate or Command Per Clock rate is NOT a memory timing, it is a memory controller transfer characteristic.

The CPU and most types of memory have an 8 byte data transfer bus. They transfer 8 bytes of data once, twice, or four times per clock tick. However, for efficiency the basic unit of data transfer is a 32 byte "burst" of data around the address of the data the CPU needs. Any CPU reference to memory is rounded up to a complete 32 byte block. This block is transferred in a burst of 4 consecutive 8 byte transfers. Your timing settings effect this transfer, not the Command per clock.

The Command Per Clock sets the Command Rate for the memory controller. At 1T, the controller can issue commands on every clock cycle, if set to 2T the controller can only issue commands only on every other bus cycle. With DDR, the 2T command rate had some poor transferrals since there was little use for the bus interleaving (Dual Channel Mode). Let us say that if you ran at a 2.5 - 3 - 3 latency then the read command would be issued 2 cycles after an bank activate command. This would negate 1T vs 2T correct? Since the issuance was held to 2 cycles there would be no need for a single cycle command rate.

But we have DDR running in Dual Channel Mode and this mode allows for an opening of more than one page in different banks of the same memory device (slots related to dual channel ie. Bank 1 and Bank 3, etc.). So the second bank activate command that follows after the first bank activate command can not be issued since a read command for the first bank has already been scheduled. This is considered a "Bus Contention" and because of it, the next available time slot for the next bank activate command would collide with the second read command for the possibility of a page hit. This would continue until there is a no-op (no operation) return. When there is a no-op return or interval then another bank activate command can be initiated. Because of this issue, dual channel is largely useless, not only is it useless but it can even slow bank activation. This issue follows with DDR2 but one of the reasons for the creation of the DDR2 standard was to eliminate this previously mentioned bus contention. The DDR2 standard created the Posted CAS characteristic, so that there was no need to wait for the Trcd function to be completed. The Posted CAS feature allowed for the Read command to be issued immediately after the bank activate command. But this "Feature" can only be useful with a 1T command rate since a 2T command rate would eliminate the use of this characteristic.

Thus in a DDR2 system, with dual channel bank interleaving enabled there will be a more responsive system. Now there are added latancy issues with DDR2 vs DDR1 so for this benefit to be more effectively seen, one needs very low latency DDR2 DRAM.

Intel Northbridge/Memory Controller Hubss run with a 2T command rate. You must set to 2T.

Research:

http://www.techpowerup.com/articles/other/114

http://www.pctuner.net/forum/showthread.php?t=66649 (not english but still easily understood)

I found it, it was not in Asus forum, it was in the faq for Striker extreme, and it seems to only apply when OC'ing. Text below.

Question

I found my system being having different memory overclocking capability when dimms are installed under slot A1+B1 or slot A2+B2 combination.

Is this normal?

Answer

Yes, this is perfectly normal for this motherboard, as the two memory channel were designed based on two completely different implementations to ensure overclocking capability for different usage models:

Memory slot A1 and B1 have been specifically optimized for overclocking with memory capable of running 1T command.

Memory slot A2 and B2 have been specifically optimized for overclocking with memory capable of running 2T command.

Please install RAM modules onto DIMM slot A1 and B1 if wish to overclock using 1T command capable memory modules, or use A2 and B2 if otherwise, to ensure best overclocking result.

You MUST set to 2T. Contrary to popular belief, the Command rate or Command Per Clock rate is NOT a memory timing, it is a memory controller transfer characteristic.

 

The CPU and most types of memory have an 8 byte data transfer bus. They transfer 8 bytes of data once, twice, or four times per clock tick. However, for efficiency the basic unit of data transfer is a 32 byte "burst" of data around the address of the data the CPU needs. Any CPU reference to memory is rounded up to a complete 32 byte block. This block is transferred in a burst of 4 consecutive 8 byte transfers. Your timing settings effect this transfer, not the Command per clock.

 

The Command Per Clock sets the Command Rate for the memory controller. At 1T, the controller can issue commands on every clock cycle, if set to 2T the controller can only issue commands only on every other bus cycle. With DDR, the 2T command rate had some poor transferrals since there was little use for the bus interleaving (Dual Channel Mode). Let us say that if you ran at a 2.5 - 3 - 3 latency then the read command would be issued 2 cycles after an bank activate command. This would negate 1T vs 2T correct? Since the issuance was held to 2 cycles there would be no need for a single cycle command rate.

 

But we have DDR running in Dual Channel Mode and this mode allows for an opening of more than one page in different banks of the same memory device (slots related to dual channel ie. Bank 1 and Bank 3, etc.). So the second bank activate command that follows after the first bank activate command can not be issued since a read command for the first bank has already been scheduled. This is considered a "Bus Contention" and because of it, the next available time slot for the next bank activate command would collide with the second read command for the possibility of a page hit. This would continue until there is a no-op (no operation) return. When there is a no-op return or interval then another bank activate command can be initiated. Because of this issue, dual channel is largely useless, not only is it useless but it can even slow bank activation. This issue follows with DDR2 but one of the reasons for the creation of the DDR2 standard was to eliminate this previously mentioned bus contention. The DDR2 standard created the Posted CAS characteristic, so that there was no need to wait for the Trcd function to be completed. The Posted CAS feature allowed for the Read command to be issued immediately after the bank activate command. But this "Feature" can only be useful with a 1T command rate since a 2T command rate would eliminate the use of this characteristic.

 

Thus in a DDR2 system, with dual channel bank interleaving enabled there will be a more responsive system. Now there are added latancy issues with DDR2 vs DDR1 so for this benefit to be more effectively seen, one needs very low latency DDR2 DRAM.

 

Intel Northbridge/Memory Controller Hubss run with a 2T command rate. You must set to 2T.

 

Research:

 

http://www.techpowerup.com/articles/other/114

http://www.pctuner.net/forum/showthread.php?t=66649 (not english but still easily understood)

Ahh ok, thanks for your time and answer. What is your opinion of the test results?

I have seen this before and my testing has always shown errors in the 1T command rate UNLESS NO OVERCLOCKING was done. Since I always overclock, it made no difference to me.

As a matter of a fact, the 1T command rate NEVER produced longterm stability. I could find short term stability with 1T and no overclocking. This only applied to the ASUS implimentations of 680i and reference Nvidia boards all produced instability at the 1T command rate. This is in my testing and I have read on other sites of people who claim a fully stable and overclocked 1T command rate with Striker. I wonder to the long term effects on the MCH.

As well, no Intel board that I have tested has ever produced stability on a 1T command rate.

I have seen this before and my testing has always shown errors in the 1T command rate UNLESS NO OVERCLOCKING was done. Since I always overclock, it made no difference to me.

 

As a matter of a fact, the 1T command rate NEVER produced longterm stability. I could find short term stability with 1T and no overclocking. This only applied to the ASUS implimentations of 680i and reference Nvidia boards all produced instability at the 1T command rate. This is in my testing and I have read on other sites of people who claim a fully stable and overclocked 1T command rate with Striker. I wonder to the long term effects on the MCH.

 

As well, no Intel board that I have tested has ever produced stability on a 1T command rate.

I used the settings you specified above:

Set to:

Tcl:5

Trcd:5

Trp:5

Tras:18

2T Timing.

 

Set the Vdimm to 2.1v

All other settings are on auto. It was then I got the results that I specified today in an earlier post.

I have been sitting and reading up on prime95. Especially how to run it with the both cores. I am gonna run it now While i sleep.